TPMC917
TPMC917 4 MB SRAM (battery backup) with 4 Channel RS232
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TPMC917 4 MB SRAM (battery backup) Module
The TPMC917 is a standard single-width 32 bit PMC module providing 4Mbyte SRAM with battery backup by an on board lithium cell for all SRAM devises and four ESD protected RS232 channels. The 4Mbyte SRAM is organized in two banks, each of them provides 512k x 32 bit memory. During normal operation (standard 5V supply applied to the SRAMs) the capacity of the lithium cell is monitored every 24 hours by the battery monitor device and an interrupt can be generated, if the battery voltage is too low. The monitor device switches the power supply of the SRAMs from the standard 5V to the battery if the 5V supply drops below the threshold level of the battery monitor device. Any active access to the SRAMs at this point is executed correctly within 1.5µs. After this time any further accesses to the SRAMs are not possible. A miniature DIP-switch allows the selection of the battery backup source either from the on board lithium cell or from an external battery via the P14 I/O connector. The TPMC917-10 provides four RS232 channels. Each channel has a programmable baud rate up to 115.2 kbaud. The 4 channel UART16C654 provides 64byte transmit FIFO and 64byte receive FIFO for each channel to significantly reduce the overhead required to provide data to and get data from the transmitter and receiver. The FIFO trigger levels are programmable. The channels are ESD protected up to +/-15kV according to the human body model and IEC1000-4-2. Technical Specifications
| Logic Interface |
PCI Mezzanine Card Interface |
| Size |
Single Size CMC |
| PCI Target Chip |
PCI9030 (PLX Technology) |
| PCI I/O Signaling Voltage Keying |
3.3V, 5V tolerant |
| UART-Controller |
ST16C654 (4 channel UART) |
| Number of RS232 Channels |
4 |
| I/O Interface |
DB25 Female Connector, 64 pins Mezzanine P14 I/O |
| FIFO |
64byte transmit FIFO, 64byte receive FIFO per channel) |
| Interrupts |
PCI INTA for all channels, on board interrupt status register |
| I/O Signals / Channel |
TX, RX, RTS, CTS, GND |
| Maximum Transfer Rate |
Up to 115.2kbaud @2.5nF and 3kohms load impedanceb |
| ESD Protection |
+/- 15kV Human Body Model, +/- 6kV IEC1000-4-2 model |
| SRAM Memory Capacity |
4Mbyte, 2 banks organized as 512k x 32 |
| On board Battery Type |
CR2430 lithium cell (285mAh capacity) |
| Battery Fault Voltage |
2.6V typical |
| Battery Life Time |
Caused by self discharging effects: @25°C: 8 years approx. @45°C: 4 years approx. |
| Data Retention Time @25°C |
5 years typical (with a fresh on board CR2430 lithium cell) |
| Data Retention Voltage |
2.0V minimum |
| 5V Power Failure Threshold |
2.0V |
| External Battery Voltage via P14 I/O |
5.5V maximum / 3.0V minimum |
| Power Requirements |
177mA typical @ +3.3V 456mA typical @ +5V 360µA maximum@ +12V (no load on serial ports) 360µA maximum@ -12V (no load on serial ports) Battery backoff: 1.6µA typical @ 25°C |
| Temperature Range |
Operating: 0°C to +70°C Storage: -55°C to +125°C |
| Weight |
75g |
| Humidity |
5 - 95% non-condensing |
| MTBF |
236646h |
Manuals
TPMC917 |
Data Sheet |
TPMC917-DOC |
User Documentation for TPMC917 |
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